BILLNET: A Binarized Conv3D-LSTM Network with Logic-gated residual architecture for hardware-efficient video inference

Van Thien Nguyen (1) , William Guicquero (1, 2) , Gilles Sicard (1, 2)

1 DOPT - Département d'Optronique
2 DACLE-LETI - Département d'Architectures, Conception et Logiciels Embarqués-LETI

Long Short-Term Memory (LSTM) and 3D convolution (Conv3D) show impressive results for many video-based applications but require large memory and intensive computing. Motivated by recent works on hardware-algorithmic co-design towards efficient inference, we propose a compact binarized Conv3D-LSTM model architecture called BILLNET, compatible with a highly resource-constrained hardware. Firstly, BILLNET proposes to factorize the costly standard Conv3D by two pointwise convolutions with a grouped convolution in-between. Secondly, BILLNET enables binarized weights and activations via a MUX-OR-gated residual architecture. Finally, to efficiently train BILLNET, we propose a multi-stage training strategy enabling to fully quantize LSTM layers. Results on Jester dataset show that our method can obtain high accuracy with extremely low memory and computational budgets compared to existing Conv3D resource-efficient models.

Mots clés: 3D CNN; LSTM; quantized neural networks; skip connections; channel attention; logic-gated CNN

Domaines: Sciences de l'ingénieur [physics]

Van Thien Nguyen, William Guicquero, Gilles Sicard. BILLNET: A Binarized Conv3D-LSTM Network with Logic-gated residual architecture for hardware-efficient video inference. SiPS 2022 - IEEE Workshop on Signal Processing Systems, Nov 2022, Rennes, France. ⟨10.1109/SiPS55645.2022.9919206⟩. ⟨cea-04556186⟩