An Analog-to-Information VGA image sensor architecture for support vector machine on compressive measurements

Wissam Benjilali (1) , William Guicquero (2, 3, 1) , Laurent Jacques (4) , Gilles Sicard (2, 3, 1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 DOPT - Département d'Optronique
3 DACLE-LETI - Département d'Architectures, Conception et Logiciels Embarqués-LETI
4 ICTEAM - Institute of Information and Communication Technologies, Electronics and Applied Mathematics

This work presents a compact VGA (480 × 640) CMOS Image Sensor (CIS) architecture with dedicated end-ofcolumn Compressive Sensing (CS) scheme allowing embedded object recognition. The architecture takes advantage of a lowfootprint pseudo-random data mixing circuit and a first order incremental Sigma-Delta (Σ∆) Analog to Digital Converter (ADC) to extract compressed features. The proposed CIS achieves an object recognition accuracy of ' 93% on the Georgia Tech face recognition database (GIT, 10 classes out of 50) thanks to a linear Support Vector Machine (SVM) classifier implemented by an optimized Digital Signal Processing (DSP). We stress that the signal independent dimensionality reduction performed by our dedicated CS scheme (1/480) allows to dramatically reduce memory requirements (≈ 32 kbit) related –in our case– to the ex-situ learned affine function of the linear SVM.

Mots clés: embedded object recognition; compressive sensing; pseudo-random permutations; Sigma-Delta; SVM

Domaines: Sciences de l'ingénieur [physics]

Wissam Benjilali, William Guicquero, Laurent Jacques, Gilles Sicard. An Analog-to-Information VGA image sensor architecture for support vector machine on compressive measurements. ISCAS 2019 - IEEE International Symposium on Circuits and Systems, May 2019, Sapporo, Japan. ⟨10.1109/ISCAS.2019.8702325⟩. ⟨cea-04548791⟩