Enhanced thermal confinement in phase-change memory targeting current reduction

C. de Camaret (1, 2) , G. Bourgeois (2) , O. Cueto (2) , V. Meli (2) , S. Martin (2) , D. Despois (2) , V. Beugin (2) , N. Castellani (2) , M.C. Cyrille (2) , F. Andrieu (2) , J. Arcamone (2) , Y. Le-Friec (1) , Gabriele Navarro (2)

1 ST-CROLLES - STMicroelectronics [Crolles]
2 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information

In this work, we present the extensive electrical characterization of 4kb Phase-Change Memory (PCM) arrays based on "Wall" structure and Ge-rich GeSbTe (GST) material, integrating a SiC dielectric with low thermal conductivity surrounding the heater element for enhanced cell thermal efficiency. We investigate the effects of the introduction of such dielectrics on the electrical performances of the device and we provide a promising path to achieve energy-efficient PCM cells supporting our results by electro-thermal TCAD simulations.

Domaines: Sciences de l'ingénieur [physics]

C. de Camaret, G. Bourgeois, O. Cueto, V. Meli, S. Martin, et al.. Enhanced thermal confinement in phase-change memory targeting current reduction. ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference, Sep 2022, Milan, Italy. pp.233-236, ⟨10.1109/ESSDERC55479.2022.9947190⟩. ⟨cea-03927940⟩