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A 35.6 TOPS/W/mm2 3-Stage Pipelined Computational SRAM With Adjustable Form Factor for Highly Data-Centric Applications

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Submitted on : Thursday, March 10, 2022 - 6:00:10 PM
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Jean-Philippe Noel Noel, Manuel Pezzin, Roman Gauchi, Jean-Frédéric Christmann, Maha Kooli, et al.. A 35.6 TOPS/W/mm2 3-Stage Pipelined Computational SRAM With Adjustable Form Factor for Highly Data-Centric Applications. IEEE Journal of Solid-State Circuits, Institute of Electrical and Electronics Engineers, 2020, 2, pp.286-298. ⟨10.1109/LSSC.2020.3010377⟩. ⟨cea-03605066⟩

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