System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications

Aditya Narayan; Yvain Thonnart; Pascal Vivet; Ajay Joshi; Ayse Coskun

doi:10.23919/DATE48585.2020.9116496

Conference papers

System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications

Aditya Narayan ¹ Yvain Thonnart ^{2, 3} Pascal Vivet ⁴ Ajay Joshi ¹ Ayse Coskun ¹

1 BU - Boston University [Boston]

2 DACLE-LETI - Département d'Architectures, Conception et Logiciels Embarqués-LETI

3 LFIM - Laboratoire Fonctions Innovantes pour circuits Mixtes

UGA - Université Grenoble Alpes, DSCIN - Département Systèmes et Circuits Intégrés Numériques : DRT/LIST/DSCIN

4 DSCIN - Département Systèmes et Circuits Intégrés Numériques

Document type :

Conference papers

Domain :

Engineering Sciences [physics] / Micro and nanotechnologies/Microelectronics

Complete list of metadata

https://hal-cea.archives-ouvertes.fr/cea-03471369
Contributor : Yvain Thonnart Connect in order to contact the contributor
Submitted on : Wednesday, December 8, 2021 - 6:41:27 PM
Last modification on : Saturday, February 19, 2022 - 3:13:47 AM

System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications

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System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications

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