Z²-FET DC hysteresis: deep understanding and preliminary model

J. Lacord (1) , S. Martinie (1) , M.-S Parihar (2) , K Lee (2) , M Bawedin (2) , S Cristoloveanu (2) , Y Taur (3) , J.-Ch Barbé (1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
3 UC San Diego - University of California [San Diego]

Z²-FET, a partially gated diode, was explored for ESD application due to its sharp switching behavior [1,2]. 1T-DRAM application of Z²-FET has recently been evidenced [3,4] leading to an even stronger interest for this device. However, a deep explanation of physical phenomena involved in Z²-FET operation has not been proposed yet. In this paper, we provide a detailed description of the Z²-FET DC behavior based on TCAD simulations and propose corresponding analytical modeling.

Mots clés: Z²-FET; 1T-DRAM; DC operation; TCAD; compact model

Domaines: Sciences de l'ingénieur [physics]; Micro et nanotechnologies/Microélectronique

J. Lacord, S. Martinie, M.-S Parihar, K Lee, M Bawedin, et al.. Z²-FET DC hysteresis: deep understanding and preliminary model. SISPAD 2017, Sep 2017, Kamakura, Japan. ⟨cea-02270891⟩