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In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization

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Abstract

Achieving the lowest possible operating voltage is needed to minimize the power consumption of a circuit but also to increase its reliability w.r.t hardware errors. An in-situ technique to estimate and reduce the design margins of a circuit is presented which significantly minimizes the operating voltage and tracks it during run-time operation of a circuit without failure. A DSP core embedding this technique has been fabricated and measured. Its V$_{min}$ has been estimated within +3.5%/-2.5% at nominal clock frequency (1600MHz), thus reducing by 19% its energy per operation.
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cea-02194423 , version 1 (24-09-2019)

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Ivan Miro-Panades, Edith Beigné, Olivier Billoint, Yvain Thonnart. In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization. 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS), IEEE, Jul 2017, Thessaloniki, Greece. pp.96-99, ⟨10.1109/IOLTS.2017.8046240⟩. ⟨cea-02194423⟩
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