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212-Gbit/s 2:1 multiplexing selector realised in InP DHBT

Abstract : In this Letter, the authors report on the design, optimisation and electrical measurements of a new fully integrated multiplexing selector fabricated in 0.7-mu m indium phosphide (InP) double-heterojunction bipolar transistor technology. All parts of the circuit were optimised to obtain 200-Gbit/s class of operation. They present electrical performances at 140 and to a record speed of 212 Gbit/s, highlighting their respective measurement challenges. The power consumption of the circuit is 0.5 and 0.8 W for a differential output amplitude of 240 and 730 mV, respectively. This selector has been successfully used as modulator driver in optical transmission experiments up to 204 Gbit/s.
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https://hal-cea.archives-ouvertes.fr/cea-02186471
Contributor : Marianne Leriche <>
Submitted on : Wednesday, July 17, 2019 - 12:22:12 PM
Last modification on : Thursday, June 11, 2020 - 5:04:09 PM

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A. Konczykowska, F. Jorge, M. Riet, V. Nodjiadjim, B. Duval, et al.. 212-Gbit/s 2:1 multiplexing selector realised in InP DHBT. Electronics Letters, IET, 2019, 55 (5), pp.242-243. ⟨10.1049/el.2018.7545⟩. ⟨cea-02186471⟩

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