Resistive RAM Endurance Array-Level Characterization and Correction Techniques Targeting Deep Learning Applications - CEA - Commissariat à l’énergie atomique et aux énergies alternatives Access content directly
Journal Articles IEEE Transactions on Electron Devices Year : 2019

Resistive RAM Endurance Array-Level Characterization and Correction Techniques Targeting Deep Learning Applications

Mohamed M. Sabry
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Tony Wu
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Binh Q. Le
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Abstract

Limited endurance of resistive RAM (RRAM) is a major challenge for future computing systems. Using thorough endurance tests that incorporate fine-grained read operations at the array level, we quantify for the first time temporary write failures (TWFs) caused by intrinsic RRAM cycle-to-cycle and cell-to-cell variations. We also quantify permanent write failures (PWFs) caused by irreversible breakdown/dissolution of the conductive filament. We show how technology-, RRAM programing-, and system resilience-level solutions can be effectively combined to design new generations of energy-efficient computing systems that can successfully run deep learning (and other machine learning) applications despite TWFs and PWFs. We analyze corresponding system lifetimes and TWF bit error ratio.

Dates and versions

cea-02186452 , version 1 (17-07-2019)

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Alessandro Grossi, Elisa Vianello, Mohamed M. Sabry, Marios Barlas, Laurent Grenouillet, et al.. Resistive RAM Endurance Array-Level Characterization and Correction Techniques Targeting Deep Learning Applications. IEEE Transactions on Electron Devices, 2019, 66 (3), pp.1281-1288. ⟨10.1109/TED.2019.2894387⟩. ⟨cea-02186452⟩
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