Phase-Change Memory: Performance, Roles and Challenges

G. Navarro (1) , G. Bourgeois (1) , J. Kluge (1) , A. L. Serra (1) , A. Verdy (1) , J. Garrione (1) , M. C. Cyrille (1) , N. Bernier (1) , A. Jannaud (1) , C. Sabbione (1) , M. Bernard (1) , E. Nolot (1) , F. Fillot (1) , P. Noé (1) , L. Fellouh (1) , G. Rodriguez (1) , V. Beugin (1) , O. Cueto (1) , N. Castellani (1) , J. Coignus (1) , V. Delaye (1) , C. Socquet-Clerc (1) , T. Magis (1) , C. Boixaderas (1) , S. Barnola (1) , E. Nowak (1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information

In this paper we analyze recent progress in Phase-Change Memory (PCM) technology targeting both Storage Class Memory and embedded applications. The challenge to achieve a high temperature data retention without compromising the device programming speed can be addressed by material engineering. We show that volume and thermal confinement improvement of the phase-change material enables a high (10-fold) reduction of the programming current, achieved also by the optimization of the device architecture, in particular in the case of a confined structure. It leads to a higher cell efficiency proven by a 6x reduction of the programming current density wrt a standard PCM structure. Furthermore, we demonstrate the reduction of thermal losses by the tuning of the thermal conductivity of the dielectrics surrounding the phase-change material. Finally, we propose some considerations about the PCM ultimate scaling and the reliability at such dimensions, showing that the engineering of the bottom electrode/phase-change material interface can lead to a reduced variability in scaled devices.

Domaines: Physique [physics]; Sciences de l'ingénieur [physics]

G. Navarro, G. Bourgeois, J. Kluge, A. L. Serra, A. Verdy, et al.. Phase-Change Memory: Performance, Roles and Challenges. 2018 IEEE International Memory Workshop (IMW), May 2018, Kyoto, Japan. ⟨cea-02185419⟩