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Optimizing Programming Energy for Improved RRAM Reliability for High Endurance Applications

Abstract

In this paper, we investigate RRAM endurance improvement by optimizing programming energy on HfO$_2$/Ti OXRAM 1T1R kb arrays. SET and RESET programming patterns are optimized with programming current of 50^\mu$A, to minimize the energy provided to the system, maintaining sufficient widow margin on resistance distribution tails. Impact of both SET and RESET pattern on window margin is addressed. Programming scheme based on opti mized ramp voltage patterns allows to improve maximum endurance of about 2 decades, to insure stable median window margin at 10$^7$ cycles and to maintain window margin at 2$\sigma$ after 10$^6$ cycles at 50$\mu$A
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Dates and versions

cea-02185395 , version 1 (16-07-2019)

Identifiers

  • HAL Id : cea-02185395 , version 1

Cite

G. Sassine, D. Alfaro Robayo, C. Nail, J.-F. Nodin, J. Coignus, et al.. Optimizing Programming Energy for Improved RRAM Reliability for High Endurance Applications. 2018 IEEE International Memory Workshop (IMW), May 2018, Kyoto, Japan. ⟨cea-02185395⟩
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