A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm 2 Die-to-Die Optical Networks - Archive ouverte HAL Access content directly
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A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm 2 Die-to-Die Optical Networks

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Abstract

Silicon photonics has allowed cost reduction and performance improvement for optical interconnects for the past few years, and short-reach wavelength-division-multiplexed (WDM) links have recently emerged thanks to the introduction of microring modulators and filters [1-5]. Nevertheless, the promise of optical networks-on-chip foreseen in [1] has to face the integration challenges of scalable low-footprint elementary drivers and robust operation under heavy thermal stress due to self-heating of the cores with varying loads. This work presents a 3D-stacked CMOS-on-Si-photonic transceiver chip, which includes base building-blocks targeting die-to-die WDM optical communication for multicore processors: 10Gbps 2.5V pp OOK modulator driver, associated receiver, and digitally-supervised analog wavelength stabilization using microring heaters and remapping for 0-to-90°C operating range, for a total footprint of 0.01mm 2 per microring.
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Dates and versions

cea-02184631 , version 1 (17-12-2021)

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Yvain Thonnart, Mounir Zid, Jose Luis Gonzalez-Jimenez, Guillaume Waltener, Robert Polster, et al.. A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm 2 Die-to-Die Optical Networks. 2018 IEEE International Solid-State Circuits Conference (ISSCC), Feb 2018, San Francisco, United States. pp.350-352, ⟨10.1109/ISSCC.2018.8310328⟩. ⟨cea-02184631⟩
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