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Performance and Transport Analysis of Vertically Stacked p-FET SOI Nanowires

Abstract : This work presents the performance and transport characteristics of vertically stacked p-MOSFET SOI nanowires (NWs) with inner spacers and epitaxial growth of SiGe raised source/drain. Electrical characterization is performed for NWs with [110] and [100] channel orientations, as a function of both fin width (W$_{FIN}$) and channel length (L). Results show a good electrostatic control and reduced short channel effects (SCE) down to 15nm gate length. Improved effective mobility is obtained for [110]-oriented NWs due to higher sidewall mobility contribution.
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Submitted on : Tuesday, January 8, 2019 - 4:25:21 PM
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Bruna Cardoso Paz, Marcelo Antonio Pavanello, Mikael Casse, Sylvain Barraud, Gilles Reimbold, et al.. Performance and Transport Analysis of Vertically Stacked p-FET SOI Nanowires. 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Apr 2017, Athènes, Greece. ⟨10.1109/ULIS.2017.7962606⟩. ⟨cea-01974216⟩



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