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Hardware acceleration for Just-In-Time compilation on heterogeneous embedded systems

Abstract : Embedded systems are increasingly complex and heterogeneous to deal with increasing performance requirements along with wider ranges of application domains. The architecture of such systems often includes different kinds of computing resources and accelerators (DSPs, GPUs, etc.). Thus, application developers are facing important portability issues to adapt their software code to take maximum advantage of available processing elements. Consequently, software stacks rely more and more on virtualization technologies, leveraging Just-In-Time compilation to maximize performance of applications. Nevertheless, the efficiency of Just-In-Time compilation depends on the ability to compensate its overhead with execution speedups of generated code. In this paper, we propose a solution based on a dedicated processor with specialized instructions for critical functions to improve efficiency of code generators. These specialized instructions provide an average 5× speedup on manipulations of associative arrays and dynamic memory allocation. Based on the LLVM framework, we show a 15% overall speedup on code generator's execution time. Because our specialized instructions are hidden behind standard libraries, we also argue that these instructions may be transparently reused for a wider range of applications.
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https://hal-cea.archives-ouvertes.fr/cea-01839863
Contributor : Léna Le Roy <>
Submitted on : Monday, July 16, 2018 - 10:06:15 AM
Last modification on : Monday, February 10, 2020 - 6:14:16 PM

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A. Carbon, Y. Lhuillier, H.-P. Charles. Hardware acceleration for Just-In-Time compilation on heterogeneous embedded systems. 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors, Jun 2013, Washington, DC, United States. pp.203-210, ⟨10.1109/ASAP.2013.6567576⟩. ⟨cea-01839863⟩

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