A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC - Archive ouverte HAL Access content directly
Conference Papers Year : 2013

A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC

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Sylvain Engels
R. Wilson

Abstract

In order to optimize global energy efficiency in the context of dynamic Process-Voltage-Temperature variations in advanced nodes, a fine-grain Adaptive Voltage and Frequency Scaling architecture is proposed and implemented on a 32 nm GALS Multi-Processor SoC. Each Processing Element is an independent Voltage-Frequency island and shows up to 18.2% energy gains due to local adaptability. Compared to a worst case approach, our proposal also allows a frequency boosting around 25% for a total area overhead of 10% including local frequency/voltage actuators, sensors and digital controller.
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Dates and versions

cea-01837015 , version 1 (12-07-2018)

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E. Beigne, I. Miro-Panades, Yvain Thonnart, L. Alacoque, Pascal Vivet, et al.. A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. 2013 Proceedings of the ESSCIRC (ESSCIRC), Sep 2013, Bucharest, Romania. pp.57-60, ⟨10.1109/ESSCIRC.2013.6649071⟩. ⟨cea-01837015⟩
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