Software acceleration of floating-point multiplication using runtime code generation - Student paper - Archive ouverte HAL Access content directly
Conference Papers Year : 2013

Software acceleration of floating-point multiplication using runtime code generation - Student paper

Abstract

Floating-point units are seldom in highly constrained systems, due to silicon and energy footprint, but emulated instead in algorithms based on integer arithmetic. In this paper, we use runtime code generation to generate outperforming flexible and optimized floating-point routines. On a Texas Instrument MSP430 fitted with only 512 bytes of RAM, we achieved mean speedups of 1032 % and 52 %, with tuning features enabling peaks up to 2012 % and 64 %, respectively for floating-point multiplication and an applicative case. At the best of our knowledge, runtime code generation was never achieved with such few computing and memory resources.
Not file

Dates and versions

cea-01836862 , version 1 (12-07-2018)

Identifiers

Cite

C. Aracil, Damien Couroussé. Software acceleration of floating-point multiplication using runtime code generation - Student paper. 2013 4th Annual International Conference on Energy Aware Computing Systems and Applications (ICEAC), Dec 2013, Istanbul, Turkey. pp.18-23, ⟨10.1109/ICEAC.2013.6737630⟩. ⟨cea-01836862⟩

Collections

CEA DRT LIST DSCIN
31 View
0 Download

Altmetric

Share

Gmail Facebook Twitter LinkedIn More