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Formal Specification and Automated Verification of Railway Software with Frama-C

Virgile Prévosto 1 Jochen Burghardt 2 Jens Gerlach 2 Kerstin Hartig 2 Hans-Werner Pohl 2 Kim Völlinger 2
1 LSL - Laboratoire Sûreté des Logiciels
DILS - Département Ingénierie Logiciels et Systèmes : DRT/LIST/DILS
2 Fraunhofer FOKUS - Fraunhofer Institute for Open Communication Systems
Abstract : —This paper presents the use of the Frama-C toolkit for the formal verification of a model of train-controlling software against the requirements of the CENELEC norm EN 50128. We also compare our formal approach with traditional unit testing.
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Contributor : Virgile Prevosto <>
Submitted on : Wednesday, July 11, 2018 - 3:29:57 PM
Last modification on : Tuesday, December 8, 2020 - 9:38:37 AM
Long-term archiving on: : Saturday, October 13, 2018 - 6:22:24 AM

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Virgile Prévosto, Jochen Burghardt, Jens Gerlach, Kerstin Hartig, Hans-Werner Pohl, et al.. Formal Specification and Automated Verification of Railway Software with Frama-C. IEEE International Conference on Industrial Informatics - INDIN, Jul 2013, Bochum, France. ⟨cea-01835639⟩

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