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Journal Articles Procedia Computer Science Year : 2013

PACHA : Low cost bare metal development for shared memory manycore accelerators

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Abstract

Today, efficiently implementing an application on shared memory manycore accelerators is a hard task. Linux eases the development, but is not adapted to exploit the maximum of the platform yet. Bare metal programming environments provided with accelerators give a low-overhead access to the platform. However, they increase the complexity of development, mainly due to 4 gaps: each accelerator has its own specific environment; bare metal environments are only supported on the hardware platform or on the proprietary simulator; they have seldom, if ever, execution debugging support; they do not have parallel programming models, and whenever they exist, they are platform-specific. In order to fill the gaps and thus, to lower the barrier to develop on bare metal on shared memory manycore accelerators, we present PACHA. It features two aspects: A low overhead, Platform Agnostic, Close-to-HArdware (PACHA) programming interface, which allows to handle only one version of the application code for all supported accelerators, and an easy-to-use multi-platform development environment, which abstracts the complexity of each accelerator's development environment. With a x86 support and a Linux compatibility, PACHA offers a functional simulator and all the Linux set of debugging tools. Further, based on the programming interface, three parallel execution models have been ported in order to facilitate the development and comparison of applications. PACHA is currently fully supported for x86 platforms, TILEPro64 and STHORM. A case study on a TILEPro64 is presented: The performance gain using PACHA rather than Linux with OpenMP or Pthread is about 1,8x to 4x, without increasing the development cost.
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Dates and versions

cea-01831560 , version 1 (06-07-2018)

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Attribution - NonCommercial - NoDerivatives - CC BY 4.0

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A. Aminot, A. Guerre, J. Peeters, Y. Lhuillier. PACHA : Low cost bare metal development for shared memory manycore accelerators. Procedia Computer Science, 2013, 18, pp.1644-1653. ⟨10.1016/j.procs.2013.05.332⟩. ⟨cea-01831560⟩

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