A context saving fault tolerant approach for a shared memory many-core architecture

E. Wachter (1) , N. Ventroux (2) , Fernando Gehm Moraes (1)

1 FACIN
2 DACLE-LIST - Département d'Architectures, Conception et Logiciels Embarqués-LIST

Mechanisms for runtime fault-tolerance in many-core architectures are mandatory to cope with transient and permanent faults. This issue is even more relevant with aggressive technology nodes due to process variability, aging effects, and susceptibility to upsets, among other factors. This work proposes to save periodically the context and to re-schedule tasks to the last reliable known state and avoid the faulty processor. This technique is implemented on an embedded multicore architecture named P2012. The proposed fault-tolerant approach induces a limited overhead of 9.37% in an industrial image processing application while guaranteeing a full-error recovery if any error is detected.

Mots clés: Fault tolerance; Image processing; Memory architecture; Network-on-chip; Software architecture; System-on-chip; Check pointing; context saving; Fault recovery; Industrial image processing; Many-core architecture; Process Variability; rollback; Transient and permanent fault; Computer architecture

Domaines: Sciences de l'ingénieur [physics]

E. Wachter, N. Ventroux, Fernando Gehm Moraes. A context saving fault tolerant approach for a shared memory many-core architecture. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), May 2015, Lisbon, Portugal. pp.1570-1573, ⟨10.1109/ISCAS.2015.7168947⟩. ⟨cea-01817862⟩