Skip to Main content Skip to Navigation
Conference papers

Real-time decoding of brain activity by embedded Spiking Neural Networks using OxRAM synapses

T. Werner 1, * D. Garbin 1 E. Vianello 1 O. Bichler 2 D. Cattaert 3 B. Yvert 4, 5 B. de Salvo 1 L. Perniola 1
* Corresponding author
1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 DACLE-LIST - Département d'Architectures, Conception et Logiciels Embarqués-LIST
3 UB - Université de Bordeaux
4 UGA [2016-2019] - Université Grenoble Alpes [2016-2019]
5 Clinatec - Centre de recherche biomédicale Edmond J.Safra
Abstract : An innovative approach for decoding of brain signals based on Spiking Neural Networks is presented in this paper. Synapses are implemented by BEOL compatible oxide resistive RAM (OxRAM) devices providing low programming voltages (<2.5V) and currents (∼30μA). Spike-timing-dependent plasticity enables the network for autonomous online spike sorting of measured biological signals. Ultra-low synaptic power consumption in the range of 10nW, recognition rates around 90% and real-time functionality bear high potential for future healthcare applications.
Keywords : Decoding Brain computer interface Intelligent agents Interfaces (computer) Neural networks RRAM Reconfigurable hardware Neuromorphic computing Programming voltage Spike timing dependent plasticities Spike-sorting Spiking neural networks Brain Innovative approaches Health care application Biological signals Signal processing
Document type :
Conference papers
Complete list of metadatas
https://hal-cea.archives-ouvertes.fr/cea-01817861
Contributor : Léna Le Roy <>
Submitted on : Monday, June 18, 2018 - 2:28:53 PM
Last modification on : Friday, November 6, 2020 - 4:35:21 AM

Identifiers

Collections

CEA | CEA-UPSAY | DRT | LIST | LETI | CEA-GRE | UGA

Citation

T. Werner, D. Garbin, E. Vianello, O. Bichler, D. Cattaert, et al.. Real-time decoding of brain activity by embedded Spiking Neural Networks using OxRAM synapses. 2016 IEEE International Symposium on Circuits and Systems (ISCAS), May 2016, Montreal, Canada. pp.2318-2321, ⟨10.1109/ISCAS.2016.7539048⟩. ⟨cea-01817861⟩

Export

BibTeX TEI DC DCterms EndNote

Share

Metrics

Record views

141