A simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures

Tanguy Sassolas (1) , Chiara Sandionigi (1) , Alexandre Guerre (1) , Julien Mottin (2) , Pascal Vivet (2) , Hela Boussetta (3) , Nicolas Peltier (3)

1 LIST (CEA) - Laboratoire d'Intégration des Systèmes et des Technologies
2 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
3 DOCEA Power

Modern SoCs are characterized by increasing power density and consequently increasing temperature, that directly impacts performances, reliability and cost of a device through its packaging. Thermal issues need to be predicted and mitigated as early as possible in the design flow, when the optimization opportunities are the highest. In this paper, we present an efficient framework for the design of dynamic thermal mitigation schemes based on a high-level SystemC virtual prototype tightly coupled with efficient power and thermal simulation tools. We demonstrate the benefit of our approach through silicon comparison with the SThorm 64-core architecture and provide simulation speed results making it a sound solution for the design of thermal mitigation early in the flow.

Domaines: Systèmes embarqués

Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Julien Mottin, Pascal Vivet, et al.. A simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures. 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Jul 2015, Rome, Italy. ⟨10.1109/ISLPED.2015.7273485⟩. ⟨cea-01235183⟩