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Communication Dans Un Congrès Année : 2020

Build Your Own Static WCET analyser: the Case of the Automotive Processor AURIX TC275

Résumé

Static Analysis (SA) is one of the solutions to estimate upper bounds of Worst Case Execution Times (WCET). It relies on a set of mathematical techniques, such as IPET (Implicit Path Enumeration Technique), and abstract interpretation based on Circular Linear Progressions, whose implementation partially depends on the target processor. This paper shows how an industrial end-user can develop a static WCET analyser for a specific processor target thanks to the built-in components and the modularity of the OTAWA WCET analysis framework. It points out the main difficulties that have been encountered, and gives an estimation of the development effort and of the accuracy of the results. In this paper, the approach is applied on the Infineon AURIX TC275 microcontroller.
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Dates et versions

hal-02507130 , version 1 (12-03-2020)

Identifiants

  • HAL Id : hal-02507130 , version 1

Citer

Wei-Tsun Sun, Eric Jenn, Hugues Cassé. Build Your Own Static WCET analyser: the Case of the Automotive Processor AURIX TC275. 10th European Congress on Embedded Real Time Software and Systems (ERTS 2020), Jan 2020, Toulouse, France. ⟨hal-02507130⟩
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